Electrical Engineering

The Photon

00:29

@MLM Tieing ~RESET to some of the general IO pins looks a little odd...

MLM

@ThePhoton it is tied vcc 3.3v

the testing i/o is just 3.3v and 0v to show some sample bits

The Photon

@MLM Beyond that, there' s not nearly enough shown in that schematic to say if you have hooked it up correctly or not. Did you include bypass capacitors? Did you include pull-up resistors on digital i/o's where they're needed?

MLM

@ThePhoton ummmm, no

got to look up what a bypass cap is for :/

The Photon

@MLM First, I'd put a bypass capacitor, maybe 0.1 uF, between Vdd and Vss as close to the chip as possible. It is there to make sure the power supply can provide current quickly when the io pins switch.

MLM

don't exactly know where and when to use passives btw

The Photon

00:36

Next I'd add resistors (maybe 1k) between GPA7 and Vcc and between GPA6 and Vcc, etc...In case these i/o's get accidentally set to outputting "0" you don't want to fry the chip.

Similar if you have any I/O's tied direct to ground.

MLM

@ThePhoton so these are current limiting resistors?

The Photon

@MLM yes

MLM

I need to pick up some diodes (I have none) should i go for rectifier, zener, schottky?

The Photon

@MLM What are you using them for? Schottky's are very similar to the usual pn-junction diode but with a lower forward voltage, usually faster switching, maybe worse reverse leakage. Zeners are entirely different.

MLM

00:52

@ThePhoton anything that I might need in the future. Just building a small collection so I don't have to order and wait everytime I need something

I would say generic but that doesn't give you a use case to choose the appropriate type.

The Photon

@MLM Having some basic silicon rectifier diodes around is probably a good idea. Anything else depends a lot on what kind of projects you want to do.

Anindo Ghosh

03:23

@jippie microsystemservices.wordpress.com/2011/05/09/…

vvavepacket

hey anindo u still remember frequency responses, systems etc?

Anindo Ghosh

03:50

@vvavepacket To an extent

angelatlarge

05:14

Hallo

rawbrawb

@angelatlarge hello!

Anindo Ghosh

GrEEtz

rawbrawb

@AnindoGhosh hey, how is it going?

jippie

06:00

@AnindoGhosh Are you serious!? Is the mains grid that bad in India?

good morning @all btw

Stacey Anne

06:45

curious to know what happened here

0

Q: Reactance / Inductance / Impedance of a 1:1 Transformer

I've searched around and poored through what references I have available, and haven't been able to find an answer to this question. Regarding 1:1 transformers, I found a website where an audio amplifier electronics guy mentioned that it doesn't seem too much to matter how many winds you put on a...

jippie

Hi @StaceyAnne

Stacey Anne

hi @jippie, how are you?

jippie

awake

:)

yourself?

Stacey Anne

oh dear. sounds like you need coffee

I'm doing well

jippie

just finished todays coffee :o)

@StaceyAnne what's with the question?

Stacey Anne

06:54

the OP's accepted answer disappeared

I don't drink coffee

jippie

You're probably best to ask this in the chat room EE - Ask a Moderator. But there is someone that creates a lot of sockpuppet accounts and occasionally gives a good answer so that's my guess. Edit - just noticed you asked on meta which is the other appropriate place to ask. — PeterJ 9 mins ago

@StaceyAnne @PeterJ is correct.

Stacey Anne

yeah, that comment is new

ok

jippie

no. it is 9 minutes old already

Stacey Anne

but if it's a legit answer, then why remove it?

or leave it for community moderation, at least

new to me :P

jippie

@StaceyAnne I didn't investigate, but what usually happens is this:

- a lot of bullshit answers are posted by a single user

- along with an incidental reasonable one

- the user is removed for all the poor answers

- with that the incidental reasonable answer disappears too

Stacey Anne

06:58

that makes sense

although you would think whoever is doing it would get bored

jippie

@StaceyAnne yes you would think so, but this person is keeping himself pretty busy with authoring answers and incidental questions.

Stacey Anne

poor mods

jippie

@StaceyAnne Ever noticed how most questions have a notice:

> This question is protected to prevent "thanks!", "me too!", or spam answers by new users. To answer it, you must have earned at least 10 reputation on this site.

Stacey Anne

@jippie, yeah. I was wondering about that. I guess I know now

wait, so why don't we just auto-protect ALL new questions

I guess that would make it difficult for legit new people

jippie

@StaceyAnne yes it would, as if the current situation is much better ...

user61389

07:08

@StaceyAnne exactly. People would have to ask upvoted questions first before being able to answer.

user61389

Good morning.

jippie

Do you know any C18 by any chance @StaceyAnne?

Stacey Anne

@CamilStaps, mornin'

user61389

I think it's a good idea, it helps keeping the community small as well, but you'd never get it through the mods/SE team.

Stacey Anne

@jippie, I've used Microchip's MPLAB before, but not for PIC18's though

jippie

07:11

hmm

ah

Stacey Anne

so no C18

jippie

I rest my case :o)

Stacey Anne

how different is it from usual C?

jippie

May 9 at 7:01, by jippie

@angelatlarge Girls don't speak C18 nor SPI, so @CamilStaps can't communicate with them

I guess I was correct there ;o)

user61389

@jippie you want more stars?

Stacey Anne

07:14

@CamilStaps, @jippie, hey, I speak SPI

jippie

hush you foolish girl!

user61389

@jippie ha!

Stacey Anne

I'm with @CamilStaps on this one

jippie

/me is grumpy now for the rest of the day.

user61389

@jippie good reason to get out and go for your social life?

jippie

07:19

Anyways, time to get ~~to the office~~ a social life

user61389

@jippie bye :)

Stacey Anne

That's the one thing I miss about working for a ee company. co-workers to stand around drinking tea/coffee/beer with and discussing stuff

now I have you guys :)

jippie

@StaceyAnne too late to start telling me you appreciate me hanging here.

Stacey Anne

@jippie, you don't count, you insulted my gender. ;)

abdullah kahraman

Hi!

Stacey Anne

07:25

hi @abdullahkahraman

Jim

I was told to come in here since I wasn't getting much help with my question on meta:meta.electronics.stackexchange.com/questions/2933/…

user61389

Hello @Jim

Jim

I read the FAQ on reasons for questions or answers being removed. None of them are valid.

the answer given was reasonable and satisfactory since noone else was even responding and the comments lead to better understanding of the issue at hand. My question wasn't deleted, but the useful answer and all the comments from the other user were. :(

Stacey Anne

hi @Jim

Jim

I don't even understand this kind of behavior. If I'm the one asking the question, then ultimately I'm the one who should determine what constitutes a reasonable answer.

user61389

07:29

@Jim the answer on your question was most likely given by someone who posts a lot of garbage and one incidental good one (yours). The user gets removed to make him stop posting garbage, but therefore the answer on your question got removed as well.

Jim

I don't need moderates determining that for me

well that is really really suck

his user name was Joey

does that sound like a non legit user?

user61389

@Jim that's one of his names indeed

user61389

@Jim the moderators do a good job. If the user wouldn't have been deleted he would've been posting so much more crap

Jim

wouldn't a better solution to be just to let the system work itself out by letting others downvote crap?

Stacey Anne

@Jim, that's what I said

Jim

07:32

now the user will just go make another alias and post more crap and its a cycle

user61389

@Jim it would flood the main page. With removing the accounts it's getting somewhat more complicated for him, and he stops earlier.

Jim

i don't understand the psychology. why would someone post crap answers and also some good ones?

and then bother to stick around if people downvote him

user61389

@Jim it's a troll. The one good one makes it harder to determine if it's him.

Jim

@ camil staps "it would flood the main page." that would only be true if he was posting questions. was he also postiong questions?

user61389

@Jim the main page gets updated for answers as well. But yes, he's posting questions as well, occasionally.

Jim

07:35

oh because an answer pushes a question to the top of the stack. ok i get it

user61389

@Jim this really is the only option for the mods. I'm sorry for you.

Jim

oh well

it's been one bad experience. i'll just choke it down

user61389

If you now know the answer, you could write it yourself and get the reps :)

abdullah kahraman

1

Q: Transfer function synthesis

Is there a design methodology to create a circuit that implements a specified transfer function? I know that there are automatic top-down design flows in logic design where you describe a function at RTL level and technology does the rest, but what about other domains? Transfer functions were ...

synthesis transfer-function

What do you think, guys?

Jim

other than the time that some dude asked a question and nobody wanted to answer him and i did and i got flagged because it was unconventional. the guy asked an unconventional question and i gave him an unconventional answer. he was even admitted to be looking for something unconventional.

meh

well yeah i'm going to have to go write up the answer now, which is a hassle

lol

it was already there but that's what needs to happen

user61389

07:39

@abdullahkahraman about what?

Jim

"purported" haha at that word technology

user61389

@Jim thank you, and again sorry

abdullah kahraman

@CamilStaps Anything but the question that I posted link of.

Jim

oh sorry you weren't talking to me

my bad

anyway i'm oof

user61389

@abdullahkahraman I was thinking... life is strange. And why don't these kids out there have to go to school?

user61389

07:40

@Jim bye!

abdullah kahraman

@CamilStaps Yeah, go on..

user61389

@abdullahkahraman no seriously, what do you want with that question?

Jim

Ok i answered my own question based on what I learned from Joey. If you're curious to know what question was "in question" (LOL) here it is: electronics.stackexchange.com/questions/70760/…

user61389

I edited that 24 seconds after the first post :)

Jim

hehe

:D

abdullah kahraman

07:53

@CamilStaps Look at the comments for both OP and the answer. What do you think on this subject?

user61389

@abdullahkahraman the question isn't very well formulated, and that causes irritation. Andy is right the question isn't clear, but he should ask for more information in comments instead of answering with insufficient information.

abdullah kahraman

@StaceyAnne As a software guru, I want to know your opinion, too.

@CamilStaps Actually, he copied and pasted his answer on my question to this question..

user61389

@abdullahkahraman lol :) but yes, you're right about the difference between analog/digital, I think

user61389

08:11

user61389

My latest project :P

Stacey Anne

@abdullahkahraman, I guess there are a couple of other things that probably also need to be considered with this. for example, does every arbitrary transfer function have an equivalent circuit. Is it possible to have a transfer function for which a circuit is impossible?

and from the set of which transfer functions which realise circuits, which would be useful

abdullah kahraman

@StaceyAnne Hmm, yes..

Stacey Anne

and then it can be decided if it's worth knowing about a universal model at all

abdullah kahraman

@CamilStaps What is that, a counter that counts up to 10? :)

@StaceyAnne I would never trust a computer creating analog circuits.

user61389

08:17

@abdullahkahraman yes, I still find it hard :P no a 'PIClock', I needed a watch...

Stacey Anne

@abdullahkahraman, I agree

abdullah kahraman

WOW, he told me to shut up!

PeterJ

@CamilStaps, normally when I mount a switch I drill a hole first before closing the enclosure :)

abdullah kahraman

What is an analog dinosaur?

Stacey Anne

@abdullahkahraman, good reply

abdullah kahraman

08:23

@StaceyAnne lol, I don't want to be mean, but he deserved that..

user61389

@PeterJ sssh :) I first wanted to glue the switch in, but then I couldn't press it anymore.. I wasted too buttons :P

abdullah kahraman

@CamilStaps Hahahahahahaha!

user61389

Now it's the battery pack that keeps the button in place, what would Olin say of that! :)

abdullah kahraman

@CamilStaps Oh, man! :)

raforanz

09:21

hello

anyone knows diptrace pcb design?

PeterJ

09:44

Hi @raforanz ! Can't help you with diptrace however.

abdullah kahraman

09:59

Anyone knows replacement parts for DiskOnChip EEPROMs?

We have a universal programmer but it does not include MD2202-D16 in its device database..

How to program?

PeterJ

10:48

@abdullahkahraman, I remember those and they were popular SRAM replacements. Not sure of a replacements and don't know how you'll go, really FLASH has either gone down the path of serial interfaces or things with column / row / data all multiplexed to deal with larger sizes without too many pins.

abdullah kahraman

@PeterJ Google tells me that DiskOnChip is a confidential protocol and cannot be accessed via MCUs, since internal registers are hidden information.

PeterJ

@abdullahkahraman mmmm, they disk had wear levelling etc (no doubt proprietary) but the interface as the datasheet seems to show is just a normal SRAM type interface. That's what I seem to remember was the market - swap out an SRAM chip and get a pin-compatible non-volatile FLASH.

@abdullahkahraman, although I may be thinking about an earlier generation where that was the case, re-reading that later generation looks like it may have been more aimed at systems where the OS didn't have a FLASH-aware filesystem.

abdullah kahraman

@PeterJ But we have to read what is inside it. :) Anyways, there are some IDE adapters, I think we will lead to that way. Thanks for your help :)

PeterJ

11:16

@abdullahkahraman, yes looking further it's in no way a standard SRAM interface, just hacked onto one to keep the hardware simple. I remember now I was thinking of some products Dallas (now taken over by Maxim) used to have.

Anindo Ghosh

12:08

@jippie Yes. In some towns, voltage varies between 100 V and 350 V on a daily basis. Frequency is typically 60 +/-3, but sometimes, much more extreme variations happen, especially on the smaller grids.

abdullah kahraman

@AnindoGhosh Wow!

PeterJ

12:22

@AnindoGhosh, I can't find a good reference but about 20+ years ago there was an industrial dispute in a state of Australia involving power workers. As a protest they cranked up the mains frequency during the day to shorten the length of a working as shown by most clocks of the day lol.

Anindo Ghosh

@PeterJ There used to be these mains-line synced radio clocks back in the 70s, which were considered useless in India due to frequency drift.

PeterJ

@AnindoGhosh, it seems to have fallen out of favour here too. The only thing I have that I suspect still uses it is my oven that I've noticed stays very accurate over a year. Even if it was made in New Zealand and goes from 24:00 to 00:01 at midnight ;)

David Kessner

13:56

Hi all!

abdullah kahraman

@DavidKessner Hi!

MLM

14:24

Heya

The community ad I made seems to be the most popular: meta.electronics.stackexchange.com/ads/display/2515

(the hamster one)

jippie

@MLM would you know from the top of your head to which fpga dev boards i am limited when i want to develop on linux with freely available software?

or rather which FPGA device series

not so much the dev board

MLM

@jippie I think Xilinx's webpack works on linux maybe....

I know you can use Spartan 3E, Spartan 6

jippie

€ apt-cache search fpga
confluence - language for synchronous reactive hardware system design
openwince-jtag - allows programming jtag capable devices such as CPUs or FPGAs

These two packages are available from repositories ...

I have to google on them first

PeterJ

@jippie, here's the link... windows.microsoft.com/en-au/windows/buy

jippie

spartan is xilinx?

@PeterJ yes, very funny

MLM

14:38

@jippie not sure on that one, but their software supports it for sure

jippie

oh right you wrote that

oh

m.

MLM

@jippie Xilinx does make the spartan chips

jippie

@MLM @AnindoGhosh thinks I'm smart enough to figure out FPGA by myself, with a bit of help from Google, but I'm not convinced yet

MLM

@jippie I did it with that course. Haven't even got into microcontrollers yet...

It gives a great overview of the language

jippie

I guess my biggest handicap is Linux dev environment.

I never realized that rabbitlike ad was a free FPGA course

MLM

14:53

@jippie ye, not sure what you can use. Might just want to dual boot or something

PeterJ

First bit of VHDL code I wrote I 'initialized' all the variables to zero before I realised what I was doing. Then when I sorted things my design ended up using over 50% of a XC3S500E just to count from 1-99 on a 7-segment display.

jippie

@MLM not willing to invest in a Windows license

@PeterJ is that bad?

I am an FPGA nitwit

MLM

@PeterJ lol, only two days ago did I finally get 0-9999 on a 4 digit seven seg

its pretty involved to get it to count

jippie

I know it has logic cells that you can interconnect, but I have no clue on how many

PeterJ

@jippie, considering I've seen space invaders implemented using about the same I'm guessing it wasn't a good effort

MLM

14:56

@jippie it has a lot - never hit the barrier yet

I have the 250k version

250,000 gates

jippie

@PeterJ so I can solve sudoku's in parallel on it when I get the hang of them?

@MLM gate is a logic gate ([N]AND [N]OR) or does that include flip flops too?

MLM

@jippie not sure of the algorithm for that kind of work but can't imagine that it would hit the limits

PeterJ

@jippie, I don't know how to solve sudoku's using my neurons, although may be down to < 500K left

jippie

or do I have to 'make' flip flops myself?

MLM

@jippie umm, I believe a gate is a flip-flop

which can be arranged into a nand or anything

jippie

14:59

I wouldn't know how to solve it either on an FPGA, but the parallelization makes that you can check all possibilities for every single sudoku-cell

I've written a sudoku-like program once and all it does is for every cell check n×n×n possibilities

OK I optimized it a bit

but it is a lot tests in series

not that it would be a real project though, but that did make me think

how can you wire a flip flop into an logic gate

is it a basic SR-FF?

MLM

@jippie you don't really have to think about that

you just write logic

signal asdf: std_logic_vector(3 downto 0);

jippie

@MLM I like to understand the mechanics, so I can understand why things don't work ;o)

MLM

asdf <= "0101";

jippie

hmm

definitely have to do some reading

MLM

if asdf = "0101" then --do stuff endif;

PeterJ

15:04

@jippie, not that I know much about it but sometimes GPU cards are a good solution for that stuff. I just did a search and it looks like Nvidia have some CUDA code for Sudoku: developer.nvidia.com/gpu-ai-board-games

jippie

@PeterJ yeah I do a lot of reading through my GPU.

@PeterJ if it is a viable project, I'm especially interested in it to create it myself, to learn from it.

also I have a standard on board intel chipset that does all for me

which doesn't mean that you didn't make me curious .... clickkk

PeterJ

@jippie, main reason I mentioned it that GPUs can have thousands of processors and they are built in volume. For some things they are much cheaper / faster than an FPGA. Not that they are anywhere near as flexible.

jippie

But an FPGA on a colorful pcb sounds better than ./sudokuGPU.py

.

PeterJ

@jippie, but you can mine Bitcoins while your GPU is idle lol.

jippie

I bet someone is mining bitcoins on an FPGA, just because it is possible

MLM

15:11

I looked into FPGA mining but not sure on what the calculation actually is to do it.

I know generally it is like sha256(sha256(x)) < something

jippie

not sure if a 3GHz CPU is slower than a 25MHz FPGA

PeterJ

There are projects around to do it, but considerably more expensive than using ATI graphics cards. I believe there is an ASIC to do it now just getting around the traps.

MLM

@jippie even the Basys2 ($50) says it can get up to 500 Mhz

jippie

@MLM I was thinking a complete dev board for around that price :-p

MLM

I don't have the header pins to change the clock speed so I have only every used the 50 Mhz. There is also an external slot for another more solid crystal

jippie

15:30

@MLM the idea with microcontrollers today is that virtually any logic function can easily be solved with a microcontroller, often being cheaper, fewer components, more stable, only handful pins, ... (compared to discretes) Is that the same with FPGA's or are those usually expensive, requiring more components (external flash, clock) and always countless pins?

MLM

@jippie i would say that is probably more expensive if just implementing passives.

jippie

pin count is always high? or are there like 8 pin fpga's commonly available?

MLM

@jippie basys2 has 16 i/o but not sure if that is a Spartan 3E limit or just the dev board

PeterJ

@jippie, not so much but take a look at CPLDs and GAL devices which are often smaller

jippie

@PeterJ PAL is about the same as GAL, right?

3

Q: What is the difference between a GAL and a PAL?

I was reading this article (unfortunately a lengthy Dutch discussion) talking about a GAL. I have come across the GAL device before, but never really understood what a Generic Array Logic is. I know what a PAL is and I am under the impression that they're closely related, how do they compare?

programmable-logic

PeterJ

15:35

@jippie, yes I think so, can't remember if there are technically differences but same idea

jippie

What is the difference between CPLD and FPGA? Or should I post that on the stack as a question?

PeterJ

It's another one I'm not clear cut on, but I think largely a marketing thing where a one is a smaller / simpler version of the other. A bit like when a microcontroller becomes a DSP is not always clear cut.

David Kessner

@jippie PAL was trademarked. GAL is the Lattice Semi version of a PAL.

PeterJ

@DavidKessner, actually jippie's question is something I wondered about a while ago. Most high gate count FPGAs have stacks of pins, whereas some things especially involving serial streams wouldn't need much I/O. Do you know if it's because they physically have to be that large or maybe just the market for high logic density but smaller packages wouldn't really be significant?

David Kessner

15:51

@PeterJ The Xilinx Spartan-3 family of chips has several variations, with the main difference being the ratio of I/O Pins to logic. Some are more logic dense, while others are I/O Dense. If I remember correctly, the Spartan-3E was more I/O dense, while 3A was logic dense (but I could have gotten that messed up).

@PeterJ Other FPGA families are not as flexible as the Spartan-3 chips, but still offer some sort of Economical vs. High Performance options (like the Xilinx 7-series).

@PeterJ But to directly answer your question: Any chip has to balance the size of the I/O buffers and pads vs. the size of the logic. Since the pads are on the periphery of the chip, in an I/O limited design they determine the minimum size of the die (and thus the cost of the chip). As the features of the chip decrease, the size of the pads doesn't. So as technology progresses, you get more logic per pin.

PeterJ

16:14

@DavidKessner, thanks that makes sense. Although it was a dud for other reasons recently I wrote a vit of VHDL to scope a project and was suprised how much logic can fit into some of the $2 odd devices classed as a CPLD.

David Kessner

@PeterJ If you write your logic to really fit the architecture of the CPLD/FPGA then you can really cram a lot in there.

jippie

16:28

@DavidKessner So what is your anwer on my question (without reading @PeterJ's first):

51 mins ago, by jippie

What is the difference between CPLD and FPGA? Or should I post that on the stack as a question?

The Photon

@jippie Historically, CPLD designs are much simpler than FPGA's. Bascially one D flipflop per IO pin, very wide fan-in gates, and a fairly simple timing module. FPGA's had were much more difficult to predict the timing of, and had much narrower fan-ins on each logic block. But many more flip-flops to work with.

New generation CPLDs from Altera and Lattice are basically just small FPGAs though---narrow fan-ins, no direct correspondence between logic elements and i/o elements.

jippie

@ThePhoton you are writing past tense?

ah :o)

The Photon

Xilinx, of course, has no new CPLDs. All of their designs are at least 7-8 years old IIRC.

@jippie The other difference is CPLDs have nonvolatile storage for the design and FPGAs mostly don't.

(I'm thinking Actel or somebody has a part sold as an FPGA with nonvolatile storage --- Xilinx, Altera and Lattice don't as far as I know.)

The new mini-FPGA CPLDs have integrated EEPROM so they keep that feature of CPLDs.

@jippie Now that I've written the answer, you should make it a question.

5

3

Q: When is a FPGA preferred instead of a CPLD, and vice versa?

I am starting out with programmable logic, and I am mostly using schematic entry. (Hey, I like to see the schematic instead of VHDL/VERILOG :P) I have been using a Xilinx CPLD originally that had 128 macrocells, and the design has a data bus and used tri state buffers extensively. Turns out it d...

fpga programmable-logic

jippie

hoping to find a cheap fpga dev board that is has linux tool chain

The Photon

10

Q: What are programmable logic ICs of different complexity used for?

Programmable logic can be implemented in your widget in many different spectrums, from burning a few gates or using a MUX to the latest FPGA with built-in microcontroller and IO peripherals, not to mention ARM's PrimeCell GPIO or other, more specific examples. For what applications are the variou...

fpga programmable-logic

jippie

16:38

what is a macro cell vs. gate?

@ThePhoton do you still want the question on the stack?

The Photon

@jippie Looks like Xilinx has Linux versions of its tools: xilinx.com/support/download/index.html/content/xilinx/en/…

@jippie Not really...should be working.

Anindo Ghosh

hello, you fine people! It seems like it's been ages since I was last online. How's the universe been doing in my absence?

The Photon

@jippie "gate" isn't really meaningful in CPLD/FPGA-land.

jippie

:-/

Anindo Ghosh

I was out all day today.

jippie

16:41

why are there articles that mention 250k gates then

The Photon

@jippie "macrocell" is the basic unit of a traditional CPLD, a big fan-in sum-of-products combinatorial logic, plus a flip-flop, plus (maybe?) an I/O buffer. With configurable interconnection between them.

@jippie Those are probably pretty old articles. They used to market FPGAs according to "equivalent gates". But that's not used much anymore because everyone realized it was rediculous

"You could replace 750,000 7400-series logic gates with this part!"

jippie

Was considering this workshop, as far as I can see Lattice has a Linux version too.

translate.google.com/…

on the other hand, I would need a laptop too ....

The Photon

16:56

@jippie For a basic design the process is: 1. Write code. 2. Write constraints file. 3. Press "go". You can send me your e.149 now and save yourself a whole day not going to the seminar.

(step 4: read the error messages and debug)

2

jippie

@ThePhoton the difference between you and me is that I don't have any prior FPGA knowledge

The Photon

@jippie The way its written, it sounds like the workshop is more about the tool flow than about teaching digital design.

jippie

hmm .. interesting point, I think I understand what you mean

jippie

17:11

of course I am not so much after digital design, I remember that from looniversity, but I want to get myself acquainted with FPGA's

MLM

@ThePhoton so much of this

The Photon

@MLM Kind of like software development.

MLM

@jippie through this chat, you sound much more knowledgeable in electronics than me. If I got through hamster's course, you can too

@ThePhoton ye, but I find myself getting stuck more often as Xilinx's errors are not always self explanatory or have click to go to error all the time.

some of the time they just say "because"...

jippie

@MLM :o) maybe I need a workshop self confidence then

The Photon

@MLM Compared to "Syntax error at line 3723"? Or "Segmentation fault"?

Remember the first time you saw "Segementation fault" and thought WTF is this ?!?

(OK so your profile says you're a Java/PHP guy, maybe you've never seen a segmentation fault...)

David Kessner

17:19

@jippie It is very difficult to answer that Q, because CPLD and FPGA are also trademarked marketing terms. My definition of a CPLD is something that uses non-volatile on-chip storage of its program. But even that definition is not super useful.

@jippie Years ago, you might call a CPLD as something that uses a product-of-sums, or a sum-of-products type of architecture. But that isn't true anymore since Altera and Lattice have "cplds" that look more like mini-FPGAs in their architecture.

jippie

m.

David Kessner

@jippie So these days, the only completely correct definition of a CPLD or FPGA is to go by whatever the mfg calls it. But that is a useless way to determine it also.

Incidentally, I am currently writing the curriculum for an FPGA/CPLD class I'm teaching in a few weeks. All of this topic is relavent.

abdullah kahraman

Bye everyone!

jippie

17:38

@DavidKessner maybe I should join that then ;o)

@abdullahkahraman was @abdullahkahraman here?

David Kessner

@jippie The power-point slides will probably be put online somewhere.

jippie

@DavidKessner ah afraid of my tough questions in class, aren't you?

David Kessner

@jippie I doubt that you could ask a question that I couldn't handle. I might not know the answer, but I'd always have a smart-ass response to you! :)

3

jippie

17:54

@DavidKessner :o)

rawbrawb

@DavidKessner be careful, next thing you'll know @jippie will have convinced to fly him out to CO. for a free class and Pannekoeks!!

jippie

CO = colo..

rawbrawb

@jippie Colorado ...

jippie

right

USA is not on my short list of countries I want to visit

rawbrawb

And Pannekoeks are some weird thing I've heard about ... ;)

jippie

17:58

however if it is for free ...

I think you mean pannekoeken

@rawbrawb they're not weird

rawbrawb

@jippie edible frisbees right?

David Kessner

@rawbrawb The class costs $10, and we only feed visitors Coors Beer and Rocky Mountain Oysters.

user61389

Good morning

David Kessner

And we take the to Casa Bonita restaurant.

jippie

@rawbrawb I understand why you say that, yes

@DavidKessner Coors is actually called beer?

and what are rocky mountain oysters?

David Kessner

18:00

@jippie In the same way that a PIC is called a microcontroller.

jippie

I think I will be bringing my own lunch

rawbrawb

@jippie well it was at one time, but it gets filtered through this wonderful organic filter called a horse.

jippie

@DavidKessner ah I see

David Kessner

Rocky Mountain oysters

Rocky Mountain oysters are bull calf testicles used for human consumption. Sometimes pig or sheep testicles are used. They are often deep-fried after being peeled, coated in flour, pepper and salt, and sometimes pounded flat. This delicacy is most often served as an appetizer with a cocktail sauce dip. North America It is a well-known novelty dish in parts of the American West and Western Canada where cattle ranching is prevalent and castration of young animals is common ("prairie oysters" is the preferred name in Canada, where they may be served in a demi-glace, not deep-fried). In Ok...

jippie

@DavidKessner interesting dish

Bitrex

18:04

@DavidKessner i.imgur.com/K2aGN.gif

David Kessner

@jippie "Casa Bonita" is a Mexican restaurant that is so notorious and bad that it was parodied in the cartoon South Park.

jippie

a famous restaurant

@DavidKessner Not sure if you should ever tell me when you visit Netherland

David Kessner

@jippie No pickled herring and whipped cream for me. I'd rather eat the rocky mtn oysters.

And no black, salty, licorice for me either. Bleh!

jippie

@DavidKessner you don't eat herring pickled, you eat them raw!

@licorice I like the honey flavor better

David Kessner

@jippie I would eat this: Hollandse Nieuwe Haring

jippie

18:10

Who has been busy with the meaningless starring? @angelatlarge won't like that!

@DavidKessner you do?

ok, I have to think of something else then

David Kessner

@jippie Yes. Looks like Dutch Sushi. I'm fairly daring when it comes to trying stuff. Pickled herring not withstanding.

@jippie I've eaten this: en.wikipedia.org/wiki/Balut_(egg) And my daughter loves them!

jippie

@DavidKessner I generally don't like my food watching me right before I eat it.

David Kessner

I've also tried Durian. It proved too much, as I couldn't eat more than 2 bites. en.wikipedia.org/wiki/Durian

I like the description on Wikipedia: "... its odor is best described as pig-s**t, turpentine and onions, garnished with a gym sock. It can be smelled from yards away."

jippie

...

@DavidKessner thanks for explaining

@DavidKessner Now I understand why your kids build ARM based science projects. All the time that they need your help to explain those things, you can't feed them strange things.

The Photon

18:26

@DavidKessner Thought it was supposed to be venison

David Kessner

@jippie What I really want is some Speculaas.

jippie

@DavidKessner that is pretty common, especially november/december. The days before Sinterklaas

good stuff

Speculaas

Speculaas (voorheen: speculatie), in België ook: speculoos (deze nevenvorm heeft zich uitgebreid tot het Belgisch-Frans als spéculoos of spéculaus) is een sterk gekruide, typisch oudnederlandse soort koek , meestal -maar niet uitsluitend- hard, droog en plat, die in de vorm van verschillende voorstellingen wordt gebakken en vooral omstreeks het sinterklaasfeest populair is. De laatste decennia is het echter normaal geworden het hele jaar door speculaas te eten. Speculaas wordt voornamelijk in Nederland en België gemaakt en gegeten, alsook in Westfalen en het Rijnland. Er zijn meerder...

gevulde speculaas is especially good :o)

translate.google.com/…

translated as "stuffed" ...

David Kessner

I'm all for anything spiced and buttery.

jippie

hamsterworks.co.nz/mediawiki/index.php/…

total += average(student.grades, student.gradeCount);

does the . (dot) in student.grades have a special meaning? Same for student.gradeCount

The Photon

@jippie student is a "struct". grades is a field in the struct.

jippie

18:37

@ThePhoton I see, I've heard struct before.

MLM

@jippie what photon said.... grades is a variable in the student class

The Photon

If we're talking C there's no such thing as classes built in to the language.

jippie

@MLM I just read that C doesn't have classes, C++ does ;o)

MLM

@jippie my bad, just jumped in. thought it was a general programming question

jippie

@MLM no it was from 'your' wiki FPGA course

No worries

The Photon

18:40

. is the field access operator for strcuts in C. -> is used if you are starting with a pointer to a struct.

jippie

m.

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