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3:26 AM
from my observations i think its also the sad effect of lower budgets going to labs
the schools realise they can save money if they go more theory and less practice
which makes students more fearful of hands on
which then has a cyclical effect
iterate that machine a few times, and you no longer have as many lab-oriented demonstrators, which means the next generation of students get less lab training
etc etc
and then a mindset develops where you don't even need to do much hands on
as one of my favourite professors used to say "In theory, theory and practice are the same thing. In practice they're not"
 
Having taught some labs, it certainly is a bit tricky - my university focused on IC design centric analog. I'm still not 100% sold on that philosophy, but it sure is a lot harder to translate that into a lab.
 
those "labs" i saw were just cadence sessions
its sad almost noone has the budget to tapeout and probe in those subjects 1-2 a year
 
A major benefit of IC design is that the simulations and calculations match reality much better. The down side is that most students don't go into IC design, so it's not great for preparing you for a "typical" job.
 
hehe yeah
 
@antimony The junior-level lab that I worked on taped-out chips. It took a lot of effort to go from zero to minimum competence in IC design, tapeout, and testing in 2 semesters.
 
3:40 AM
wow that is awesome!
did they get to measure too?
 
that was the plan, it usually worked out that they could test something
 
heheh nice :)
thats really cool
do you mind if i ask which continent that was, and which process?
 
We had a volcano in Iceland delay the FedEx shipment one year, causing us to miss getting chips back in time. Testing happened like 1-2 weeks before finals by plan.
 
ahh i remember that volcano
 
North America (US), and we fabricated on AMS and TSMC while I was there
 
3:44 AM
nice!
 
It took a ton of work to make it work "behind the scenes"
 
ahh what kind of stuff?
 
Extra lab sessions for the students to teach them how to use the tools, bounding the design problems so that they were within the lesson plans, chip integration and final tapeout, bonding diagrams and final test plans so that the students could demonstrate their circuits
 
ohh geeze, yeh thats alot to push onto the teachers
could you script integration, drc and tapeout?
 
not really, not the way we did it.
 
3:49 AM
ooof
yeah, how many students / year?
 
I think 40-60 students in groups of 3-5.
 
oh man, yeah thats alot of work
who did the bonding?
 
We used the MOSIS service for the MPW submission, and we contracted MOSIS to bond the parts into DIP-40 packages
 
ahhh nice
to your knowledge is that subject still going basically that way, ie. tapeout & measure?
 
The last time I heard, it was... but it's expensive and the schedule demands are pretty hard.
(for some value of expensive)
 
3:57 AM
yeah honestly that budget is unheard of here lately alas
previously things were different, like 10 years ago
 
Honestly, with the rising cost of education, I would be disappointed if it didn't happen any more.
 
exactly
 
But getting back to the teaching philosophy, our goal was to have students understand why they were making design decisions. Many circuit designs you can "guess" your way into a working solution - and that's not designing a circuit anymore.
Many circuit topologies also behave poorly with the "guess and check" method - they fail to work outside a relatively narrow set of parameters.
So you get the teacher push-back of "are you sure this is the right value?"... and lab preparation designed to reduce wasting time in the lab.
One thing I didn't like about our curriculum is that you only had access to lab facilities for the 3 hours during the scheduled lab. I was good at building circuits, so I always did that when I was a student. Building circuits incorrectly was the typical reason students stayed late.
 
yeah no kidding
i was lucky we could use a lab anytime as long as there wasn't a class running
except the specialty labs ofc
and all UGs had after hours access too
we could and did stay super late at night, even working in personal projects
 
If I wanted to try for something close to a Socratic method (e.g. leading students to understand why the circuit wasn't working), then I had to be really on top of it and notice when students were messing up.
Otherwise I had family time constraints that kept me from staying too late with students.
General student access to (electronics) lab facilities was one thing I advocated for constantly...
 
4:08 AM
ahh yeah
yep, totally
 
4:43 AM
yeah you sound like me, always happy to put in extra effort to help the students
partly cos honestly, it is fun and heartwarming. and also since i felt the students had a bit of a raw deal in terms of what they were paying vs what they were getting back
 

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