@KyranF How about an initial current gain, followed by a loading resistor, possibly balanced a bit, followed by a current amplification, sziklai or otherwise, decoupling, again current amplification if needed, averaging and input into a current-mirror gain differential gain stage

Possibly biased by controllable current

Can't really work out in my mind whether the controllable current would be a good idea

But potentially it's simulatable

could some form of negative feedback be implemented using a current mirror to sense the current and reduce the gain somewhere else in the stage?

In principle yes

like the increasing current results in increasing voltage on a FET, which reduces the resistance, (or vice versa, decrease voltage on fet in parallel with load resitor)

and that resistor is the one used to generate the voltage after an amplifier stage

so it can self-limit the gain

I'm thinking slightly differently

I'll quickly draw what I just described (again, the maths inside my head aren't entirely sure of it all yet, bit of a chaos in my upper storage facility the last weeks)

the circuit you suggest will be quite large, just in discrete components

9 transistors and no chip

i found a reasonable price and performance TIA by texas instruments

Again, this is heavily disclaimered

i am simulating it in TINA (which is disgusting btw) and it's coming out alright so far

On account of 2AM

go to bed

Eh, reasons

well that looks cool. ill simulate it tomorrow

im about to head home now

Technically in that ^^ I don't see a reason why that gained output cannot be used for control

But it needs another bit of averaging

On account of using the signal itself directly will not work

(positive peak -> Oh! High signal! Suppress! -> No peak)

averaging or buffering?

Averaging

ah okay, so averaging. makes sense

cant have it oscillating like crazy

or, suddenly surpressing it's urges

If you dimension it properly it will effectively become a stable, signal-less output

Oh yes, the above may need an extra capacitor around the two gain stages for stability

but since you see no values, on account of maths is too lazy to work right now, there's no point in claiming a 2nF would be perfect

haha

well, i'm off for now. thanks again for your suggestions and brain-twizzling

I like puzzles

when you came with transistors + comparator I wanted only transistors, because cooler

@Asmyldof Thanks for the chapter about the annotation in Altium. I'll experiment.

I also like procrastination when people are demanding unreasonable deadlines

Good evening

i'm on unreasonable deadlines too

and instead of just making shit and getting it done i am procrastinating on EE.SE

everyone else's problem is more interesting than your own

true

@W5VO It's more that I naturally resist bullshit

I like all the puzzles I have

I just don't like it when a 6 manmonth problem needs to be done yesterday

@abdullahkahraman Nobody ever claimed FTDI made good datasheets

Or exceptional chips

but they work

(both of them)

Most of the time

ok sorry lol

their windows drivers are exceptionaol though

wtf is that guy up to? electronics.stackexchange.com/questions/237578

Ha, finally they fired that stupid DHL guy doing everything wrong

God do I hate those questions where people ask for guesses what could be wrong

Ah, come on, all these hours! Their code was wrong..

I shall inform FTDI so other people will not suffer..

/* USER CODE BEGIN 4 */
/******************************************************************************
 * Function:        void ft800cmdWrite(ftCommand)
 * PreCondition:    None
 * Input:           ftCommand
 * Output:          None
 * Side Effects:    None
 * Overview:        Sends FT800 command
 * Note:            None
 *****************************************************************************/
void ft800cmdWrite(unsigned char ftCommand)
{
	unsigned char cZero = 0x00;														// Filler value for command

@abdullahkahraman keep some google alert (are they still a thing?) and watch people suffering. That is far more satisfying

@PlasmaHH Ah, evil! Teach me >:D

The thing is, their example code for Freescale (AN259) is written correctly:

FT800_SPI_HostCommandDummyRead();               // Read location 0 to wake up FT800
FT800_SPI_HostCommand(FT_GPU_EXTERNAL_OSC);     // Change the PLL to external clock - optional
FT800_SPI_HostCommand(FT_GPU_PLL_48M);          //  Ensure configured to 48 MHz

See how it distinguishes between a "host command" and "host command dummy read"?

The difference is in the first 2 MSB of the first byte in the SPI traffic..

I saw that datasheet giving the attention below but I ignored it as I saw that the example code just fired a "command":

> Switch from Standby/Sleep modes to active mode. Dummy read from address 0 generates ACTIVE command.

@PlasmaHH I really hate it when they don't fire them.. I mean I feel sorry but they don't do their job on purpose.. Here, in a local DHL like company office, they don't even answer the phones on purpose! I see it when I drop by their office, the phone rings and she keeps chatting, ignoring the phone!

@abdullahkahraman I might have some prejudices here, but that might be part of certain areas of your countries culture ;)

@PlasmaHH I can say that you are most probably correct.. And I sometimes think that maybe that is the reason my country is not developed.. The mindset is killing me, but hey , I cannot change it..

@abdullahkahraman not now, but you can lead by example and in a few generations... but well, did you know that we here have a famous poem about your leader? ;)

@PlasmaHH lol no

@abdullahkahraman really? talk about it has went up to high ranking politicians and it is threatening various treaties between them countries.

Recep Erdogan is the Turk’ll
Never tire of rim-jobs from his circle
Yet his chief-est delight
(Now Khilafa’s in sight)
Are the felchings he gets from Frau Merkel

This one?

@abdullahkahraman not quite how I would ever translate it, try this one: lyricstranslate.com/de/…

@PlasmaHH Not cool..

@abdullahkahraman it clearly was created to provoke and reached its goal

@PlasmaHH Well, clearly there are lots of people that is not happy with the current situation of Turkey. I see it more developed and that is what itches those people..

@abdullahkahraman see, I have not much of a problem with whatever the situation in most countries is, and if they want to stay underdeveloped or not or whatever. What I have a problem with is wanting to be part of a certain community, but not having to follow the basic things that it means to be part of. In this weird instance, it would probably mean to have the balls to stand over it and say "fuck that stupid guy, he writes shit, lets do something useful."

its kinda like the prime directive... let the sort their shit out and not interfere with them until they are ready, but then they better play along our goddamn rules.

@PlasmaHH I have come code that should copy a file in bash. But it doesn't. What do you think the problem is?

@Asmyldof cosmic radiation

@PlasmaHH good point

@PlasmaHH Yeah, you are right.. I don't agree with these guys with corrupted mindsets who are trying to be a part of EU. If they want to be a part of a big union, they need to be like them. If they don't want to be like them, they cannot enforce. If you(not you) think that "he writes shit", leave it and write it good in your country then..

On the other hand, I think he is a great leader for Turks.. This is exactly how Turks can be managed and leaded, he knows his game..

@abdullahkahraman yeah, well, if you say so. I only know those and have dealt with those that live here. If that is how they like to be managed, then all fine. Its just at many points fundamentally different from our culture, and its sometimes a bit hard to imagine that its really fine for them

@Asmyldof second best explanation I can come up with is some secret service spy software that has a bug and is messing things up in the background

@PlasmaHH Nah, can;'t happen

@Asmyldof ah, right, of course, cough

My chair squeekz

:/

@Asmyldof lay down?

@PlasmaHH On a bed of roses?

@Asmyldof on a bed of sot23

@PlasmaHH I should have more than enough for a double kingsize extra large

@Asmyldof might want to register some new fetish site domain for that

@PlasmaHH hmmmm

:D

no comment

@Asmyldof 3, 5, or 6 pin?

4

"see on photo" ... ebay.de/itm/162088701984 uhm, yeah

@PlasmaHH . . The seller must have used an old Cave Man camera. Credit given for effort :)

with a 100% seller rating no les

@W5VO Why not 100 %. Its so simple even a Cave Woman can see what he intends to deliver

wouldn't take more than an envelope to package that O'scope

But I was disappointed by the warning : "Dummie".

Even if it is original work, I think 300 EUR is a bit much for that work of art

Very drunk EE pick-up phrase: "Hey bebe, wana see my ball-grid array?"

sigh

@NickAlexeev I have been to a lot of EE conventions, and heard most lines. Never heard that one before. (Hmmm, maybe BGA hadn't been invented yet back when I attended conventions.

@Marla what is that from?

@W5VO Movie called "Grumpy Old Men"

there was later a sequel, "Grumpier Old Men"

@W5VO Mixed

@Asmyldof One of each?

@NickAlexeev 3 SOT-23 packages aren't going to go a long way to making a bed

@NickAlexeev I'd say about 70% SOT23-3; 20% SOT23-5; 10% distributed over the rest

wow, i found a recommendation "rule of thumb" for an op-amp used in active filtering to have a GBWP of 100 * A(@freq) * Freq of signal. For my 5Mhz signal, and a unity-gain at center freq, i'd need 500MHz GBWP

Not fully sure, hard to estimate with the shitloads of reels of 2N700x, BATxxS/SW, T2xxxSk

seems silly.. maybe easy for those people doing 100Khz kind of stuff but I cannot afford 500MHz op-amps for each filter dammit

What's your budget and component count / combined square area limits?

i'm currently simulating a 25Mhz op-amp to active filter the 5Mhz signal with a high Q (10) for channel select

i'd like to get the entire sensor <= $5 for 2-3 inch square area, got a 88MHz LMV793 for the TIA stage on the photodiode with Rf = 50k, and then these 25MHz LM837 for active filtering. then a cheapo quad comparator at the end after some envelope detectors on the outputs of the active filters

the LM793 is $1.3 each in units of 100+, LM837 is $1.5 each for units of 100+, the photodiode (BPW34) is about $0.4

only a small budget left for a 6-pin ZIFF ribbon connector and passives

Gonna make some dinner now, I'll have a think

well basically i need to cut some corners on performance

You want to go from 1uA to 1mA input to digital 5V output?

yeah

Supply is only 5V?

yeah, but i'm going to grab a -5V charge-pump inverter

something like this: cds.linear.com/docs/en/datasheet/660fa.pdf

So low current -5V bias available, okay

yes i will be biasing the photodiode

to make it faster

and help bandwidth overall

Okay, good to know.

diode capactiance is estimated to be 22pF at -5V bias

Well, dinner now, I'll plonk you if I think of something

k. have a good one

(might feel like simulating or mathifying this time, but no promises)

And @abdullahkahraman was never heard from again...

I just got a package with three fluke 17B+ meters from China.

They look a lot like properly designed flukes on the inside.

I just got a package with three fluke 17B+ meters from China.

@Asmyldof CE marked?

Cal cert test follows this weekend

Yah, internal movs etc and clearance including bussman hrc fuses do look cat 3 compatible for 600V as printed

If the cal state is as advertised these really are a steal

Back to cooking now

asmyldof what about using an RF quality N channel JFET as a pre-amp for the photodiode prior to the TIA interface? The TIA can convert the Ids of the JFET instead of the photocurrent directly, and i could use less gain because the JFET has already done half the work

something like a BF256 is cheap and would be fast enough for sure. I have a successful simulation using a JFET in LTSpice as a TIA front-end

i've got a pretty wide range amplifier chain going now, from the output of my TIA being 10mv p-p to 1v p-p I get a pretty good range from a NPN common emitter amplifier

What you simulationingering in?

I'm doing both TINA and LTSpice

i have the manufacturer SPICE model for the BPW34 from their website

you put a voltage on the input and it puts out photocurrent with all the parasitic elements modelled

hm

it's hard to know what sort of voltage to use, but i've found a range that generates 500nA up to 50uA photocurrent

so i'm testing in that range for now

guess I should get back into LTspice

LTSpice is much nicer UI and keyboard shortcuts than TINA

Never used TINA, whatever that is. Sounds like TI made it, so that would explain everything

yeah

it's a TI spice program

they have ridiculous encrypted models that only TINA can decrypt and run

forces you to use their program for certain parts

Which is the 23rd good reason to just not use any TI if you can avoid it

As a FET, wouldn't you prefer learnabout-electronics.org/Downloads/datasheet2N3819.pdf

Oh, lol, datasheet at a boppy tut website

yeah, i was simulating that one

the 2n3819

because that's the only reasonable RF NJFET LTSpice has by default in it's libary

libary*

LIBRARY

yah. The one you mention isn't really awesome for your bias range

okay. so the BF256 isn't any good. what parameters should I be looking for then?

i've never actually used JFETs before in anything, they are kind of fancy

lol

Well, they should have a decent output range at your allowable input voltage range, variation

so i should check for their outputs for the given 3.3/5V supply?

like Ids @ 5V or whatever?

Actually, the most important is gate off voltage

the BF has -7.5V

So....

ah

2N has -2V-ish

shit, that's true. need logic-level ones for sure

and i'd need to bias them above their Vgs threshold yes?

JFET usually don't really spec "logic level"

so they act in the linear region

You'd want to try and keep the Vds above the pinch off point

So you get a linear-ish Vg -> Id

Although in your application it may not be the most vital

cool. so I could bias the gate of an NJFET with some big fat ~1MEG resistors, whack the photodiode in voltage-mode (with as big a bias as I can get) to the gate through a cap.. and lets say I get uV to tens of mV signal from the Photodiode, I can use a darlington pair on the drain/source of the JFET to amplify the crap out of the current signal through a load resistor to get a voltage output..

you might get a decent digital signal by some trickery

i did a drawing. coming soon(tm)

something like this perhaps?

i can generate bias voltages as required, but i just put 10V there for funsies. To keep cost down will probably be 5V anyway

No, that's not quite it

darn

JFETs conduct at Vgs = 0, close below

(most)

Ntype

So, you're basically always just turning it full on

No wait that's not true

Hang on

Well, still I doubt whether this will give you the nicest respons

e

k.. well i gotta try something

and if this saves me $1 per sensor

it might be worth it

avoiding the TIA front end and using this instead

I would start off from something like....

(photoshopping... phone takes pictures at toooooo many pixelses for chat.SE)

yeah i know, 1st world problems ay. I had to paint.net mine it was like 3.8k x 2.5k res or something riduclous

And you could stop at:

ah, good old PNP

For funsies

Output of the last one can also again be PNPgained in stead of resistorGained

Last one may be tweakable with 0 to 3 extra transistors to give a square wave output that's relatively LF immune

Skottky needs low leakage, else I'd have said use a BAT54 like

But at elevated temperatures that could reverse leak a significant part of your photocurrent even at nearly no reverse voltage

Though it may be relatively tiny after all

Rg > Rphot

Rphot could be 1M, Rg several of them, cap .... mmm... whatever works for your frequencies and doesn't for anything below 500Hz

NP0 for extra cool

I'd be curious to see how strong a signal LTSpice thinks you could make with option 1

yeah i'll put a sim together on that soon

lunch time now ;)

Hello

I am a beginner of electronics and I need a PWM H-Bridge-like circuit for my 500W 24VDC motor. Where should I start from? What should I do?

Looking up how PWM and H-bridges work and why would be a tremendous start

Actually, I know a bit about PWM and H-bridges but I can't get why things get complicated when motor becomes 500W.

well 500W is only 20A at 24V so that's still not bad.

build a discrete H bridge with dual 100A FETs for each element, make sure you have some huge flyback diodes in all the usual places, and put heatsinks on everything.

by dual i mean, put two 100A FETs in parallel

the start-up current will probably be quite massive

@KyranF Is there a specific FET with a model no that I can use?

And why dual for each element?

@KyranF For Skottky use the BAS70 seems to be somewhat balanced, from the "commonplace" types.

cache.nxp.com/documents/data_sheet/…

Because stall current is stupendous

@KeremZaman i say use dual, because only 1 may not handle the current well enough. you could get away with dual 60-80A maybe 100A is a bit too much but in any case you want to do some load-sharing of the current and heat-sink each one

the higher the current rating, the lower the "On" resistance and therefore less heat

the FETs will have a high gate capacitance especially if there are two gates sharing the same control signal, so I suggest using a high power gate driver circuit (push-pull BJT stage, or a dedicated gate driver IC) in order to overcome the gate capacitance and switch the FETs as fast as possible.

Any time they spend in linear resistance region will generate heat

igglebutty

one last thing to watch out for is PWM frequencies being too high. If you swich the H bridge faster than the elements can turn on/off they will spend too much time in the linear regions again, rather than just being ON/OFF

ok, I got it a bit but i need some search about gate driver

thank you

for a 500W motor, if you can get away with audible frequency then maybe the control PWM frequency should be < 10KHz, and > 500Hz. The PWM frequency being "Fast" is only when you need high speed control over the speed of the motor

I'd not at all be surprised if an industrialist would still use a relay and a single high power FET/IGBT stage

500W DC motor and fast speed control. Hah

haha

I'm not even joking

probably a lot of inertia

TeCu relay with 2mOhm contact and 3mOhm wiper resistance >>(easy)>> HBridge

Pd-Something better

Nice fat stop relay to chunk the motor out of whatever it is mounted in

mmmmmmmm

Hello anybody in here>

?

@trilolil There is no pain you are receding...

rip pink floyd

I have a question regarding digital electronics

imgur.com/ff0MFaT

this is a system to detect overflows for ones and two s complements

but I am not sure I understand it properly

@ThePhoton

What are Ca and Cb?

@trilolil I was about to ask you. Did you get any text with the diagrams?

@ThePhoton not really

and the text I have is not in English

(very few txt)

@trilolil Is it German? I'd at least give a try.

ooh no it s in english sorry x)

ok one sec

I am used to not having english books that s why

@ThePhoton

@trilolil This is for an adder or for an ALU or piece of an ALU?

this is for an adder

it is inorder to calculate two s complement and ones complement

@ThePhoton

the first image is whenever you add two numbers (with one of the mentionned representations) you may have an overflow sometimes

and that circuit is designed to detect that overflow

Ca and Cb are "complement" controls. They set whether the logic should complement the A and/or B inputs.

C(a) is not the same as Ca.

sorry if this is a dumb question

but why would you need/do that?

when adding two numbers in 2'C whats the goal of complementing?

If you complement B, for example, you get A-B instead of A+B.

oow yes yes

I see

But you have to be careful to also add in an extra 1 count, because -B = ~B+1.

A bit confusing...

mhm

Then they use C_0, C_1, etc., to be the carry bits

So sometimes C means "complement" and sometimes it means "carry".

ok so depending on the operation you d like to do you use the complement bits.

So to invert one argument, you bring Ca xor Cb in as the carry input to the LSB full-adder.

in order to save HW

And if you get a carry out from the MSB adder, you have an overflow.

@ThePhoton it seems the overflow EXOR port would not only output 1 when the MSB adder outputs 1 but also every time when the LSB full adder outputs a 1

I actually don t even see how the two adders are used to compute 2'C. this part already got me confused

@trilolil But not if both C[n] and C[n-1] are both high.

true

Remember that C[n] is the sign bit

but it seems that everytime you do a computation on one single bit (when going from LSB to MSB) you could potentially get an overflows each time in the middle

and at the end as well

trough the C[n]

@trilolil Yes, carry's can ripple through the whole calculation, if that's what you mean.

oooh ok yes right I see

they consider the carry as an overflow each time...

yes I think that was what I meant

I'm no digital guru, but I guess there's lots of tricks (look-ahead, etc) to make the carry ripple not limit the calculation speed.

How does it actually come you are so good?

I mean you seem to know about everything o.O

@trilolil Mile wide and an inch deep.

Too thin to plow too thick to drink.

full of analogies today ay old chap

@ThePhoton one last question if I may. I just don t get this: imgur.com/29OP64G

Alternate theory: I just know how to bs about stuff I don't really know that well

you wouldn t do that...

I don t really understand how the first circuit works

one thing: is the + an add sign or an exor?

@trilolil I think it's a full adder. It has A and B inputs and Carry input and carry output.

Depending on the mood of the guy drawing it.

Carry out seems to be crossed

on all three images

@Asmyldof funny story - the slew rate on my 25Mhz LM837 means that it can reproduce the 5MHz signal but only 800mV p-p

the transistor output stage i made with a single NPN after the TIA stage goes from 120mV p-p to 3V p-p for the range of photocurrent signals i'm simulating so far