Of course every time I need @ThePhoton he selfishly is asleep....

Are there any people in the world who seriously think that Windows 10 is an improvement and aren't getting paid by Microsoft to have that opinion?

@Asmyldof probably the same ones that always wondered what would happen if they try to flush 100kg of mercury down a toilet, and then decided to try and see

....

so you dont want the video link to that? ^^

Eh

Maybe I do

you have beenwarned.I guess

@PlasmaHH That's a lot less bad than you made it sound. He's doing it in a separate toilet, not plumbed in

@Asmyldof awh, that was totally not intentional...

I amwondering if that isnt answered anywhere, it sounds like a pretty basic thing toask yourself

@Asmyldof moin

@ThePhoton You can still tell me if you know how to make copying room properties also copy sub-sheet-rooms to their right locations, for next time ^.^

And/or if you know how to make rooms a part of a union, so that when you drag your union the friggen rooms don't stay behind.... $%@$#%@^@

Altium (obvs?) BTW

@Asmyldof If I needed to do that, I would probably come ask you. I only just finished my first project where I used rooms at all.

@ThePhoton Hm, fair enough. Well I'm getting there. I'll need to start writing scripts to make it somewhat manageable to transfer to others though

It's now just my hands basically typing a story with mostly consonants

@Asmyldof, Hey the ASF LCD demo project works a lot better if you get the LCD mezzanine card fully seated on its connector.

@ThePhoton Sounds plausible

Bah

Boredom!

@ThePhoton, Task please

@Asmyldof Want to write me a task manager for my Atmel project?

Granular, sliced, real-time, priority-ring, priority-queue?

What tasks?

Using SAML22Xpro?

C, C++?

ASM?

@Asmyldof Got me. I need to receive some commands on SPI (as slave), and then fiddle around with some peripherals (SPI, I2C, on-chip ADC, mainly), and provide data back thru SPI.

Borderline worthy of any task management at all

Preferrably without having the upstream controller have to query a "busy" bit to know when the results are ready.

So just basically interrupt driven operation

The master will have to clock out data on SPI

@Asmyldof Yes, it's the having the data ready when the master wants it that might be tricksy.

May need more details, but sounds more than easy enough

@Asmyldof For example, if the master wants to know what's the voltage on a certain external ADC, I might have to do 3-4 transactions on a local SPI bus to get that value.

And you want that to be done "in real time"?

@Asmyldof Or at least with some promise about how long the master has to stall to get the result.

And if so, is there any synchronisation action available to the Atmel?

Like the way in I2C you can stall the clock

@Asmyldof What do you have in mind?

@Asmyldof Not really.

Hold signal, Busy signal, etc

The data is coming through a long pipe, and a full query (request and response) through that pipe is slow.

No, we must endeavour to keep the SPI standard, but

Some SPI hardware supports hold-signalling over an extra I/O

@Asmyldof Not available here

Data format known?

@Asmyldof TBD

okay

Approximate transaction size?

@Asmyldof 8 or 16 bits per command/response

fixed length command in, fixed length response out?

@Asmyldof yes

No 0-terminated strings or anything like that.

sequential, presumably

Nono, never those

But packeting can also be done smart

for example?

soz. neighbour break

I'm not sure how you'd do this pure interrupt driven. For example, I might be waiting for an interrupt to tell me a local SPI transaction has finished, when a new byte arrives on the slave SPI interface. (or you might be shuffling data around from the local SPI when the new data arrives) It seems like it would be pretty hairy to coordinate those things, you'd need multiple interrupt levels, ...

There's many ways to packet data that cost not too much

If I were smarter (or had done it before) it might be more obvious.

one second. He's back I think

@ThePhoton Would it help you if I told you an M0+ has 4 priority levels?

at all

@Asmyldof It would make my brain hurt more.

For example

What happens on systic?

sys ticks one tick on the systick count

But what do I need it for?

Smart to keep it reserved up high as a possible supervisory program to check for dead wait states

In real-time-ish code at least

hmmm

If you want to guarantee a request-response speed it's smart to keep the highest IRQ priority (lowest number) free for systick, which can often be set to any number of CPU cycles, to check for execution problems

So that your device can recover or at least alert

@Asmyldof So clever.

It's why normally they pay me the big bucks for ^^

What if I want to be able to queue up a bunch of requests from the master

variable length buffer, ring buffer, simple FIFO

Add an ID tag

I guess I can still have a buffer of requests and

take them one by one

{command}{tag}{details}

response comes with the tag

tag counts up in the master

guarantees you can identify repeated requests and re-link request to response

@Asmyldof hmmm

will cause only 2 executions in slave

Any of this can still use ASF to drive the peripherals?

which come out at [ADC1Val][0][26782]

e.g. ASF is safe to call in an interrupt handler?

[ADC1Val][1][45531]

Parts of it are, parts of it aren't

Usually the bare drivers are reasonably deterministic and okay on speed

however, it's wise to transfer tasking through a non-interrupted main-code system

Signalling/Events can also be used, if done wisely

The death of speed and determinism is the IRQ handler of more than 25 effective lines

You know git?

@Asmyldof SVN here

Sorry if we're old-fashioned

And not compatible with my server. Also not what I was asking. Do YOU know git?

Just made /PhotonFace/SecretSAML22.git

@Asmyldof No, maybe I have an account on GitHub but have no idea the id or password.

If I was interested in pushing to your company you'd already have an NDA and contract in your mail

Unfortunately you already have a user on asmyldof.ddns.net

Can't be undone, because the sysadmin there is incredibly lazy

@Asmyldof Whatever you're trying to tell me is going over my head

@ThePhoton I added you a user on my git server, up to you if you want to pull

Or would you like to choose your username?

@Asmyldof "thephoton" is better than "photonface"

@ThePhoton No, that's just the project folder

Your current username is photon

want the "the" added?

@Asmyldof Doesn't matter.

alright

I'll rename the project group to Photon, just for you

Don't tell ANYONE

I have a reputation of drug addicted alcoholic bastard to maintain

@Asmyldof sounds like a lot of work

It is only in theory

Probably won't look at the git until tonight when I'm home and not risking contaminating my work system with your potentially filthy alcoholic code.

Smart

Oh, my server has only 3 rules

Only 1180 more pages of the uC datasheet to re-read today

@Asmyldof git.asmyldof.com?

You'll get info soon

asmyldof.com doesn't support ddns (yet) to connect git

@ThePhoton You only contacted me on LinkedIn? Or also by mail?

@Asmyldof Only LinkedIn that I remember

firstname_lastname@yahoo.com

Lucky you could still get such a generic mail!

>.<

@Asmyldof It helps there's only like 25 people in the world with the same last name, and most of them are technophobic Germans.

@ThePhoton I meant literally

:-P

The short first name as on linkedin right?

No weird catholiccy extensions

Jamesariovashian, etc

@Asmyldof yep

alrite

@Asmyldof I think that's a Dutch thing

@ThePhoton Not just

@Asmyldof I've never heard of it in the US, and my family was historically Catholic.

@ThePhoton Hm, may not be a US thing, but it's not a Dutch thing perse

But still, there's a longer version of your name that would have been pretty likely

Not uncommon for any western culture to shorten

@Asmyldof Yes, my birth certificate and drivers license have a long form, same as the guy I'm named for in the (English version of the) Bible.

But I don't think that's a Catholic thing, just the standard English version of my name.

@ThePhoton There's a Hanzenfuss in the Bible?

It was an easy way of asking without actually mentioning your name

Invalidated by the entirety of this discussion

@Asmyldof Jereboahm

and I go by Jerry for short

I know the latter

@ThePhoton you have e-mail

After fixing some group issues, I believe I now have a project I can start working in

@Asmyldof Thanks, will check it out later.

Hm Windows 10 broke Studio

Lucky Atmel Guy on AVRFreaks fixed it

@ThePhoton Making an ASF call-back project compile for the XPLD pro is almost painful enough to just write the framework for your application

if there were enough time in a night

@Asmyldof, setting up a SERCOM for SPI in ASF, the config structure has 4 parameters, pinmux_pad0, pinmux_pad1, etc. The type is uint32_t. Any idea what is supposed to go into those fields? (I'm guessing it should be something like GPIO<n> but I don't see anything in the docs to confirm it)

@ThePhoton Probably the pad configurations as given in the table in the datasheet

but not sure right off hand

@Asmyldof I found demo code that uses EXT1_SPI_SERCOM_PINMUX_PAD3 but I haven't poked through the 3 levels of #define indirection to find out what it means.

What I'm confused by is, for example, the pads I want to use can be connected to eithe SERCOM0 or SERCOM4, but I don't see where I say which one I want to use.

You're even more confused than you think

I think

@Asmyldof So do I

Your GPIO pins can be connected to those SERCOMS

You use GPIO Pinmux tables for that

The PADs are an intermediate signal, internally, which allow you to regroup and reconfigure the pin ordering of the sercom

i.e. a certain setting to the PAD tables will make PAD0 the MOSI, PAD1 the MISO, etc

Which ends up looking like a bunch of fields to fill a 32-bit register to get to roughly what I thought it would.

Another setting may make PAD0 the SCL and PAD1 the MOSI

But PAD0 always connects to GPIOn, where n is defined

But the .h files for the XPlained dont' leave you the choice which SERCOM to use, they just assume you'll use SERCOM0 on those pins.

@Asmyldof I can see that in the device datasheet. Finding it in the code is where I'm semi-lost.

ASF, as I keep saying, is far from complete and does need maintenance, so it's not impossible some options are not available

But, be happy this is the state you get to work with. At 5000eur cost you could also get to play with ARM/KEIL and a CMSIS that implements only happy-flow even in the lowest levels

@Asmyldof After I get 10 different web pages open with documentation on a function, and on its arguments, and on the struct types of each argument, and the functions to configure the structs for the arguments, ... my brain starts to hurt a little bit.

Hm. There's a certain beautiful logic to it all

But I cannot stress enough I'm a drug addicted alcoholic bastard

@Asmyldof Oh sure, but so many layers of the onion need to be peeled before you can see it.

Well, I set up a cute little project with a reasonably clean structure to develop the examples in

But no actual code yet :/

To note: this is an example set-up

For a complicated project I would set up using full specifications and use layered abstraction for maintenance and team-work purposes, like I set up at EFFECT

This is a flat-ish structure of interweave

just for the quick and show-how

Unfortunately I'm starting to loose focus

@Asmyldof One guy at my office loved layers of abstraction. Now he's retired and nobody can figure out his code.

@ThePhoton Than he didn't love layers and abstraction, he just loved to hear himself talk

A good layered abstraction model is easy to comprehend by working downwards, where the lower layer, or at worst lower two require knowledge of chip and hadware

@Asmyldof The problem I'm having with ASF is not being able to see where one layer ends and the next one begins.

When you do it right, you're making a sort of purpose built operating system, where the most maintenance and change after you're done proving full determinism is in the upper layers just calling "GetValue(Temperature)"

@ThePhoton ASF is nor has ever been a good example of well built layered software

@Asmyldof Sure, I've been doing that kind of thing for 20 years. The problem is the abstractions that are easy for me to understand are not necessarily the same ones that are easy for the next guy.

Atmel is great at making chips, they have great tools and a very good free IDE... they suck at writing software

@ThePhoton Either your abstraction is too abstract and under-documented, or you are saddled with morons

50/50

Well, I should say, their Chip Teams suck at writing embedded software

I have the impression the Windows Dev Team is pretty much on top of their job most of the time.

@I'm going to need to do some things I need to do now. Getting paid kinds of things.

I'll push what I have, but it isn't a lot

go for it

Should have bought two of these XPlained doodads so I could make one SPI master and the other one slave.

@ThePhoton Nothing available that does SPI?

What kind of a dev-company are you guys?

Anyway, in callback it's easy enough to put both the master and the slave into the same chip

Still reasonably verifiable that it works as supposed to

Project's all pushed

thx

I'll play with it a bit more during the week

I'll try and not blow up the server in my sleep :)

It is encrypted backed up to dropbox automatically twice a week, by the way.

if that's relevant at all

Goodnight and all this

@Asmyldof gnight

Silicon Valley Code Camp is this weekend. Evergreen Valley College in San Jose. Free-of-charge.