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04:34
@Kartman Ah, thanks for pointing out the flaw. I got some idea lately how memory hierarchy works (I think their optimizations would be another pain).
I don't intend to make NVIDIA Chips, most probably I'd work on hardware VHDL code, building that hardware simulator, getting optimized ML-specific drivers, and porting OpenCL, OpenXLA, TensorFlow, PyTorch, and Keras into it (most probably cuDNN library too). The goal is to serve as a good starting point for future projects rather than to replace NVIDIA via paying them out billions of US dollars. I'm well aware NVIDIA chip prototypes are built with like 50-100 billion dollars.
If I do all the free stuff in advance (doesn't needs to outperform NVIDIA, even if it's in like 30-40% range, that'd work).
Lately, I discovered RISC-V has RVT (Tensor version) of RVV extension too. But I'm not aware of any implementation that has implemented that. I'd code those myself over RISC-V base.
 
8 hours later…
12:12
If you want to get a taste of high speed systems, get yourself a fpga dev board and go crazy with your vhdl/Verilog and see how much performance you can squeeze out of it. You’ll be nowhere near NVIDIA, but you’ll have a much better understanding of what is involved. You never know, but if you work hard at it, NVIDIA might want to hire you!
 
1 hour later…
13:23
@Kartman Are these dev boards open to the public? I'd definitely would like to try them.
Are you referring to Arduino Uno? Where codes are written in C/C++ for different stuff? (This I'm aware, but not the ones that have Vhdl/Verilog ones).

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