I did run DRC and had no errors. (In the design process, I definitely encountered traces that were too close to the pad, which I fixed.) Pardon my ignorance, but is the soldermask expansion the thin line surrounding a pad in KiCad? You are correct about the via - that's a great point, and I'll fix in in my next revision.

I'm not super familiar with KiCAD but yeah I'm pretty sure that's what the line is depicting, assuming it's the same as what I would normally see in Altium.

@Reid actually, this might be a cause of the issue as well. The very low impedance ceramic capacitors pull a big inrush current. The long wires from your power supply carry the current and have a large enough inductance to matter. So the inrush current will carry on, after the capacitors are charged. The capacitors will be charged further - so the voltage will rise over the set voltage from your power supply until everything settles down. I'd reduce the wire length as much as possible.

@Polynomial thanks for the explanation. Carefully examining an unpopulated board, I don't see any exposed copper on the traces, so I think I'm safe here. I know for sure I ran DRC based on the PCB house's specifications.

@Arsenal very interesting, I hadn't thought of that! I actually designed inrush protection into the board, but I messed up the design and had to bypass it. Reducing the wire length is unfortunately not possible (wire must be routed up a wall, across the ceiling, and down to the light fixture), but I'll work to correct my inrush protection on the next iteration.