@NickAlexeev Is it somewhat inside the possibilities to delete my accepted answer here:

Clearly pedantry about details that are unimportant and moaning about an imperfect analogy are so importsant that I feel the entirety of it is now much too confusing.

And I don't want you to start culling comments, because that'll only invite more drama I have no need for

While we are at chemistry, any plant compatible way to wash brown iron sulphate stains from stones/concrete?

@PlasmaHH Bond the iron such that it is soluable in water using a salt that isn't made of heavy metals or rare metals for your region

Suplhates are fine in moderation, so is iron

So turns out, it should wash away with water, because FeSO4 is water soluble

Which means that if it didn't, it's bonded in the concrete or stones, which means you'd need to damage the concrete down to the point where it stopped absorbing

@Asmyldof given the typical colour, I would say it reacted and is now some FeO

@PlasmaHH coal black?

hey there, I'm interested in doing some audio processing with an FPGA, and am struggling to figure out how "powerful" of an FPGA I need, or what that question even means. anyone have a good idea of some resources?

(I realize that's a very broad question)

I want to have, potentially up to 16 digital MEMS audio sensors, which each provide roughly 160 ksps of useful audio (although in the form of high frequency PDM signal)

I want to do real-time pitch shifting (and similar kinds of FFT-based effects) as well as maybe some beam-forming kind of stuff

@micahscopes If you haven't got a lot of experience yet, the only way to discover is to calculate things

@Asmyldof you mean, getting some ballparks for how many gates I will need for a given algorithm at a certain bitrate, etc?

that seems like very sound advice

Some things (like the FFT you just mentioned) you can find ready made and if the creator did a decent job you are likely able to have it synthesize in whatever brand's environment you choose, or possibly they already tell you what resources it needs

For things that are unique to your design you'll need to figure out sampling speed and propagation delays you can tollerate and then estimate the number of gates it'll probably take

Go a good percentage over with what you end up getting for your first version and make sure it has clocks fast enough to propagate your signals through that amount of gates in the time you set as a limit

How numbers of gates versus clocks works is a bit dependant on your data structure and how clocking is set up in the hardware

@Asmyldof what do you mean by "sampling speed" in this context?

(my data is already digitized, so I won't need an ADC, but I have a hunch that's not what you're referring to)

If you have a signal made of a clock and a data, there's a certain limit of delays and skews that you can tollerate

I see, so how much data I am expecting to handle per cycle

If you have an FPGA with gated I/O inputs, while it's unlikely to ever occur, theoretically you could find that for processing "in time" you need 1kHz clock, but the gating might limit you.

As well as if it is a serial stream the "sampling" of your bytes/words

In the case of many signals and FFT, it's very likely you will find that your required clock is 10 to 1000 times what would be the result of such "bare I/O" requirements, but it doesn't hurt to mention

With FPGAs I (and I only picked them back up a year ago in hobby time, of which I have none, after 9 or 12 years of not) would generally estimate what I need and find a range from a manufacturer I am personally comfortable with, where there's units with close to those figures, as well as significantly more/better and then pick a dev board (preferably manufacturer's own) with one of the much bigger ones

After all the design effort and trying the worst thing to happen is to discover shit ends up not fitting by 20%

And if you find you are only using 10% of that big chip when you feel you're done(-ish), you can then design whatever it is using the smaller alternatives that are cheaper

hmm, interesting. yeah I've been looking at some "maker" type kits that use Spartan 6 with a main microcontroller for basic IO handling and other stuff.

my gut tells me that audio stuff is on the lower-frequency side of what people often do with FPGAs, but I haven't substantiated that yet

I saw a video of someone doing real-time pitch shift with a spartan 6 (for their undergraduate project), but I have no idea of the details of that

Very possibly you can get away with one board I'm really loving, which is the Lattice MachXO3

But I cannot really confirm that

yeah it's really hard to say. these things are so open ended, which is their strength, but also why it's so hard to pin them down by some linear measure

About $25 for a board with the FPGA and just about every pin available through headers and the smaller chips themselves end up at about $2~3

My play time has been quite fun with these boards, but it'd be very short sighted of me to suggest they'd fit your application without knowing details I currently have no time for

one thing I know is that my signal, although digital, comes in the form of 2-3 Mhz PDM. so I need to figure out what form I need to get it into to do the FFT stuff and what that's gonna take

thank you so much for your perspective, be back in a little bit

@micahscopes You're probably going to want normal numbers if you want to use FFT other people designed

What that entails depends on the accuracy you expect and is inherent in the signal you get.

@Asmyldof yeah, I was imagining that to be the case for the FFT. I thought maybe for the wave-shaping stuff I might be able to do something interesting in the raw PDM form. but beyond that I need to look into converting the PDM into PCM or something

in case anyone is reading this chat in the transcript, here is a relevant discussion: compgroups.net/comp.dsp/integrate-pdm-to-pcm/3094164

@micahscopes It shouldn't be too hard. In fact, that could have been done very easily with some of the XMega chips mentioned for just two channels. No "shoehorning" required at all.

@Asmyldof would doing that sort of thing with an FPGA be a waste of FPGA resources that might be used otherwise for FFT? or should an FPGA be able to handle that kind of thing with plenty of gates left over?

@micahscopes I cannot imagine an FPGA needing a shitload of resources for 16 channels of PDM to PCM (or any similar number type)

Especially if the design and/or optimisation engine do a decent job of it

@ThePhoton re: DC-ness of the universe (chat.stackexchange.com/transcript/message/36890388#36890388); Did you consider effective total misery? I'm pretty sure that's guaranteed DC by fundamental laws of nature.

wow, encouraging to hear that!

o.O AT89S52 in an actual project. Guess I might still be able to sell my NOS of ATMega8585's after all

Anyone want to buy defunct Atmel types?

@TheNoonMoose Any customers ask for 5 ~ 25 units of hard to find Atmel shit? :-P

@Asmyldof I'm pretty sure misery is proportional to total biomass of intelligent life. So no, that hasn't been constant through the life of the universe.

@ThePhoton I'm pretty sure unstable isotopes are just depressed

@ThePhoton looking around the planet, we should all be happy right now