K Zhang

Antifreeze

@ASCII-only @MilkyWay90 I moved everything to github, here's a new link to the rule file

I also found out that you can do Layer -> Set Layer Colors... and change the colors to black and white, making the actual tetris board more visible

I have tetris working on the 8x8 based computer. It's a lot smaller: from a bounding box of 1436x5027 to 944x3666, decreasing the area taken up by just over a half.

Well, you guys started this all, I just joined in and added on to the original hardware with a bunch of trial and error. I did none of the interpreter work, compiler work, hardware architecture decisions like RSIC and harvard layout, the tetris programming, or metacell design. Give yourselves some credit, too!

I guess I'll do a byte first, and go from there.

I'd imagine that both would be fine, but only utilizing 8 of the 16 bits seems a bit inefficient.

For recieving data, should do 16 bits instead of just a byte?

It sounds doable, I'll take a look into it.

@quartata I'm not entirely sure about how to convert a metacell signal to a stream of gliders/LWSSes, considering that metacells take thousands of generations to pass their signal from one metapixel to another.

Alive and well, but somewhat inactive... oops

I was pretty burned out on this project for a while, but recently I've gotten back to making the computer based on 8x8 tiles instead of 11x11. The circuitry should be done, but I still need to test the computer a bunch to make sure I didn't forget anything.

I feel like we all are kinda slowing down with working on this... oops...

I'd require quite a bit of work to be able to execute from RAM, but I'll read about the trampoline to see if we can find a workaround

And then, the next instruction should be whichever the PC is set to

Actually, the first instruction executed is always instruction 0

Technically yes

yes

PC is indeed RAM address 0

I think I have part of an idea: make a multiplexer take an input from some sort of memory (modified synchronizer?), and have that memory be set by a new operator

It doesn't seem as hard as some of the other things I have done, though

I'd imagine that we would need to do some sort of paging technique, but I don't really know how that would work

@quartata If the computer hits and unused instruction, I think (I haven't checked) that it would write the value 0 to the destination (argument 3). The computer would run normally aside from that.

Bad news: There's still a lot to go... and stuff is already starting to look like spaghetti.

Good news: I have designed a ROM based on 8x8 tiles.

I'm currently trying to make a computer based on 8x8 cells, so that hashlife could go even faster.

Since the RAM reading and writing are both controlled by multiplexers, you should just be able to exchange some RAM tiles for a bus to work.

The only real reason why we would need to see the state of a metapixel is if we want RAM to be physically readable. I'm guessing that without this, we might stretch the rules of the original challenge, but it shouldn't affect the actual computer's performance

Still not HNQ :P

@Mego Done

It might be doable

Although, I would need to figure out something else for buffering

I could do it so that only the most recent piece of data is stored

The issue with that is if too much data is sent, some might get lost

I mean, we could just use a single synchronizer

We technically could do both

I'm not 100% on board with ports. Could someone tell me what should happen for ports?

The number of steps per cycle can vary, since some instructions read from RAM and some instructions take longer to read in general.

Although, I did make links on a bunch of the images, so you can click on most of the images to open them in varlife

True... I guess make varlife links?

I should make some animated gifs of all the components. I feel maybe that would make understanding easier.

It's amazing how flexible you can make the wires using these B1/S and B2/S cells, and that definitely helped to get things working

I'm actually kinda surprised, too

And all the timing works out

At least the inputs and outputs are aligned with the 11x11 grid

(It's a read counter)

Don't worry about it

That is some 100% totally not jank circuitry

Everything is based on collisions, so synchronization is essential