Discussion on answer by Peter Cordes: How can a 32-bit x86 CPU start with reset vector 0xFFFFFFF0 even though it starts in 16-bit real mode?

Discussion on answer by Peter Cordes:

Imported from a comment discussion on https://retrocomputing.stackexchange.com/questions/27035/how-can-a-32-bit-x86-cpu-start-with-reset-vector-0xfffffff0-even-though-it-start/27038#27038
794d ago – Peter Cordes
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May 27, 2023 18:07
The original 386 manual described the mechanism as "After RESET, address lines A{31-20} are automatically asserted for instruction fetches" and that they drop low on the first intersegment JUMP or CALL. I'm trying to work out if that really is exactly equivalent to setting CS.base = 0xffff0000, including all possible cases of wraparound. I suppose if you take the manual's phrasing literally, it would imply that RETF and IRET wouldn't drop the address lines low, but I suspect they actually do and always did, and the manual just didn't mention it.