Does anybody know of an 8-bit(single byte) ttl register chip where each bit of the one byte word(from 'left' to 'right' or vice versa) can be loaded one at a time(sequentially)?
Does anyone have any tips/suggestions for connecting the outputs of multiple ttl logic chips(common output bus). Is a tri-state buffer 'in between' each logic chip's output and the common data bus the easiest/safest way to go?